In power integrated circuits, many devices having a high breakdown voltage are known. For applications such as integrated power supplies, small motor control, and electronic lamp ballasts, where high voltage and high current are required, the current carrying capability of the device is also important. The on-state specific resistance of the power device therefore needs to be low to reduce power loss. This is very important in an IC environment where minimum area and power dissipation are essential.
One known device is the emitter switched thyristor and particularly the lateral emitter switched thyristor (LEST). Reference is made to the paper by B J Baliga and Y S Huang, entitled "Lateral Junction-isolated Emitter Switched Thyristor," IEEE Electron Device Letters vol. 13, p. 615, 1992. The thyristor current for this device can be controlled by using a MOS gate. An example of a conventional LEST structure is shown in FIG. 1. In the conventional LEST device of FIG. 1, triggering of the main thyristor is difficult. A very long n+ floating emitter is necessary to ensure that the device operates in thyristor conduction mode, which leads to excessive area consumption by the device.